CETC Solar Energy, green power unlimited

Solar Grade (SoG) Silicon Wafer

The CETC Solar Energy subsidiary Hunan Red Solar Photoelectricity Science and Technology Co., Ltd. is one of the largest manufacturers of solar silicon wafers in China. A wide range of mono-crystalline and multi-crystalline solar wafers is manufactured at the plant to meet customer-specific requirements.

At its core, the majority of the solar market is based on polysilicon and silicon wafers. As a longtime leader in producing polysilicon and wafers for the semiconductor industry, CETC Solar Energy is uniquely poised to help increase the prevalence of solar technology around the world.

Utilizing years of development, production, and research in silicon and wafer technology, CETC Solar Energy extended its expertise into the solar wafer market in 2007. The result is a proven and robust process with tremendous cost and productivity advantages for the solar industry. We are currently working on enhancing solar wafer efficiencies, as well as other pioneering efforts that will impact the solar market for years to come. As technical advances and other factors continue to increase the pervasiveness of solar around the world, CETC Solar Energy will be there providing a solid and reliable foundation to build on.

We offer silicon solar wafers in the following sizes, cut via either diamond wire (DW) or silicon carbide slurry process (SP):

Our high quality solar wafers can be manufactured to your exact specifications.

N-Type M2 Monocrystalline Silicon Wafer
Wafer Type
Size (mm)
A
B
C
D
Max
Min
Max
Min
Max
Min
Max
Min
M2
157.00
156.50
210.25
209.75
9.0
8.0
90.2°
89.8°
Material Properties
Growth Method CZ
Conductivity Type / Dopant N-type / Phosphorus
Oxygen Concentration ≤8.0×1017 atoms/cm3
Carbon Concentration ≤5×1016 atoms/cm3
Etch Pit Density (Dislocation Density) ≤500 cm-2
Surface Orientation <100>± 3°
Orientation of Pseudo Square Sides <010>, <001>± 3°
Electrical Properties
Resistivity 0.15~2.0 / 0.5~3.5 / 1.0~7.0 / 1.5~12 Ω·cm or customized production
MCLT (Minority Carrier Lifetime) (as-grown ingot) ≥ 1000 μs (Resistivity ≥ 1.0 Ω·cm); ≥ 500 μs (Resistivity ≤ 1.0 Ω·cm)
Geometry
Cutting Method DW (Diamond Wire) cutting
Geometrical Shape Pseudo Square
Bevel Edge Shape Round
Thickness 180 +20/-10 μm, 170 +20/-10 μm, 165 +20/-10 μm, 150 +20/-10 μm or customized production
TTV ≤ 30 μm
Bow ≤ 50 μm
Warpage ≤ 50 μm
Flat to Flat Length 156.75±0.25 mm
Diagonal Length See Figure
Saw Marks / Steps ≤ 15 μm
Edge Chips Depth ≤ 0.3 mm, Length ≤ 0.5 mm, Max 2 nos. per wafer; No V-chips
Breakage Nil
Micro Cracks / Holes Nil
Surface Quality As cut and cleaned, no visible contamination (oil or grease, finger prints, soap stains, slurry stains, epoxy/glue stains are not allowed)

N-Type Monocrystalline Silicon Wafer
Wafer Type
Size (mm)
A
B
C
D
Max
Min
Max
Min
Max
Min
Max
Min
125 I
125.5
124.5
150.5
149.5
84
82
31
29
125 II
125.5
124.5
165.5
164.5
109
107
13
11
156.5 I
156.5
155.5
200.5
199.5
126
124
23
21
156.5 II
156.5
155.5
203.5
202.5
131
129
19
17
Material Properties
Growth Method CZ
Conductivity Type / Dopant N-type / Phosphorus
Oxygen Concentration ≤1.0×1018 atoms/cm3
Carbon Concentration ≤5×1016 atoms/cm3
Electrical Properties
Resistivity 1~13 Ω·cm or customized production
MCLT (Minority Carrier Lifetime) (as-grown ingot) ≥ 1000 μs
Geometry
Thickness 180 ± 18 μm or customized production
TTV ≤ 30 μm
Warpage ≤ 50 μm
Flat to Flat Length 125±0.5 / 156±0.5 mm
Flat Orientation <100>± 3°
Diagonal Length See Figure
Saw Marks ≤ 15 μm
Edge Chips Depth ≤ 0.3 mm, Length ≤ 0.5 mm, Max 2 nos. per wafer
Breakage Nil
Slip / Swirl / Twin Nil
Surface Quality No surface damage, stains, water marks, or contamination allowed

P-Type Polycrystalline Silicon Wafer
Material Properties
Growth Method DSS
Conductivity Type / Dopant P-type / Boron
Oxygen Concentration ≤5.0×1017 atoms/cm3
Carbon Concentration ≤8.0×1017 atoms/cm3
Electrical Properties
Resistivity 1.0~3.0 Ω·cm
Brick Lifetime ≥ 4 μs
Geometry
Thickness 200±20 / 180±20 μm
TTV ≤ 30 μm
Warpage ≤ 50 μm
Width 156.75±0.25 mm
Right Angle 90° ± 3°
Diagonal 219.2±0.5 mm
Chamfer Size
Hypotenuse
0.5~2.0 mm
Cathetus
0.35-1.42 mm
Chamfer Angle
45° ± 10°
Microcrack Not Allowed
Saw Marks ≤10 μm, unlimited in the number of strips; 10~15 μm, ≤ 5 strips/1cm
Edge Chips Depth ≤ 0.3 mm, Length ≤ 0.5 mm, Max 2 nos. per wafer
Breakage Not Allowed
Micrograin Single Area<3×3mm2; Total Area<3×3cm2
Hole Not Allowed
Surface Quality No surface damage, stains, water marks, or contamination allowed
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