CETC - SiC Substrate

CETC, an active player in the Belt and Road (B&R) Initiative

Silicon Carbide (SiC) Substrate

The physical and electronic properties of SiC make it the foremost semiconductor material for short wavelength optoelectronic, high temperature, radiation resistant, and high-power/high-frequency electronic devices. CETC offers semiconductor silicon carbide wafers, 6H SiC and 4H SiC, in different quality grades for researcher and manufacturers. This material is manufactured upon a high-volume platform process that provides our customers the highest degree of material quality, supply assurance, and economies of scale.

2-inch Diameter 4H N-type Silicon Carbide Substrate Specification
SUBSTRATE PROPERTY	Ultra Grade	Production Grade	Research Grade	Dummy Grade
Diameter	50.8 mm ± 0.38 mm
Surface Orientation	on-axis: {0001} ± 0.2°; off-axis: 4° toward <11-20> ± 0.5°
Primary Flat Orientation	<11-20> ± 5.0˚
Secondary Flat Orientation	90.0˚ CW from Primary ± 5.0˚, silicon face up
Primary Flat Length	16.0 mm ± 1.65 mm
Secondary Flat Length	8.0 mm ± 1.65 mm
Wafer Edge	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤5 micropipes/cm²	≤10 micropipes/cm²	≤50 micropipes/cm²
Polytype Areas by High-Intensity Light	None permitted			≤10% area
Resistivity	0.015~0.028Ω·cm			(area 75%) 0.015~0.028Ω·cm
Thickness	350.0 μm ± 25.0 μm or 500.0 μm ± 25.0 μm
TTV	≤10 μm			≤15 μm
BOW (absolute value)	≤10 μm			≤15 μm
Warp	≤25 μm
Surface Finish	Double Side Polish, Si Face CMP (chemical polishing)
Surface Roughness	CMP Si Face Ra≤0.5 nm			N/A
Cracks by High-Intensity Light	None permitted
Edge Chips/Indents by Diffuse Lighting	None permitted	None permitted	Qty.2 <1.0 mm width and depth	Qty.2 <1.0 mm width and depth
Total Usable Area	≥90%	≥90%	≥80%	N/A
Note: Customerized specification other than the above parameters is acceptable.

3-inch Diameter 4H N-type Silicon Carbide Substrate Specification
SUBSTRATE PROPERTY	Ultra Grade	Production Grade	Research Grade	Dummy Grade
Diameter	76.2 mm ± 0.38 mm
Surface Orientation	on-axis: {0001} ± 0.2°; off-axis: 4° toward <11-20> ± 0.5°
Primary Flat Orientation	<11-20> ± 5.0˚
Secondary Flat Orientation	90.0˚ CW from Primary ± 5.0˚, silicon face up
Primary Flat Length	22.0 mm ± 2.0 mm
Secondary Flat Length	11.0 mm ± 1.5 mm
Wafer Edge	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤5 micropipes/cm²	≤10 micropipes/cm²	≤50 micropipes/cm²
Polytype Areas by High-Intensity Light	None permitted			≤10% area
Resistivity	0.015~0.028Ω·cm			(area 75%) 0.015~0.028Ω·cm
Thickness	350.0 μm ± 25.0 μm or 500.0 μm ± 25.0 μm
TTV	≤10 μm			≤15 μm
BOW (absolute value)	≤15 μm			≤25 μm
Warp	≤35 μm
Surface Finish	Double Side Polish, Si Face CMP (chemical polishing)
Surface Roughness	CMP Si Face Ra≤0.5 nm			N/A
Cracks by High-Intensity Light	None permitted
Edge Chips/Indents by Diffuse Lighting	None permitted	None permitted	Qty.2 <1.0 mm width and depth	Qty.2 <1.0 mm width and depth
Total Usable Area	≥90%	≥90%	≥80%	N/A
Note: Customerized specification other than the above parameters is acceptable.

4-inch Diameter 4H N-type Silicon Carbide Substrate Specification
SUBSTRATE PROPERTY	Ultra Grade	Production Grade	Research Grade	Dummy Grade
Diameter	100.0 mm +0.0/-0.5 mm
Surface Orientation	off-axis: 4° toward <11-20> ± 0.5°
Primary Flat Orientation	<11-20> ± 5.0˚
Secondary Flat Orientation	90.0˚ CW from Primary ± 5.0˚, silicon face up
Primary Flat Length	32.5 mm ± 2.0 mm
Secondary Flat Length	18.0 mm ± 2.0 mm
Wafer Edge	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤5 micropipes/cm²	≤10 micropipes/cm²	≤50 micropipes/cm²
Polytype Areas by High-Intensity Light	None permitted			≤10% area
Resistivity	0.015~0.028Ω·cm			(area 75%) 0.015~0.028Ω·cm
Thickness	350.0 μm ± 25.0 μm or 500.0 μm ± 25.0 μm
TTV	≤10 μm			≤15 μm
BOW (absolute value)	≤25 μm			≤30 μm
Warp	≤45 μm
Surface Finish	Double Side Polish, Si Face CMP (chemical polishing)
Surface Roughness	CMP Si Face Ra≤0.5 nm			N/A
Cracks by High-Intensity Light	None permitted
Edge Chips/Indents by Diffuse Lighting	None permitted	None permitted	Qty.2 <1.0 mm width and depth	Qty.2 <1.0 mm width and depth
Total Usable Area	≥90%	≥90%	≥80%	N/A
Note: Customerized specification other than the above parameters is acceptable.

4-inch Diameter 4H Semi-insulating Silicon Carbide Substrate Specification
SUBSTRATE PROPERTY	Production Grade	Research Grade	Dummy Grade
Diameter	100.0 mm +0.0/-0.5 mm
Surface Orientation	on-axis: {0001} ± 0.2°
Primary Flat Orientation	<11-20> ± 5.0˚
Secondary Flat Orientation	90.0˚ CW from Primary ± 5.0˚, silicon face up
Primary Flat Length	32.5 mm ± 2.0 mm
Secondary Flat Length	18.0 mm ± 2.0 mm
Wafer Edge	Chamfer
Micropipe Density	≤5 micropipes/cm²	≤10 micropipes/cm²	≤50 micropipes/cm²
Polytype Areas by High-Intensity Light	None permitted		≤10% area
Resistivity	0.015~0.028Ω·cm		(area 75%) 0.015~0.028Ω·cm
Thickness	350.0 μm ± 25.0 μm or 500.0 μm ± 25.0 μm
TTV	≤10 μm		≤15 μm
BOW (absolute value)	≤25 μm		≤30 μm
Warp	≤45 μm
Surface Finish	Double Side Polish, Si Face CMP (chemical polishing)
Surface Roughness	CMP Si Face Ra≤0.5 nm		N/A
Cracks by high-intensity light	None permitted
Edge Chips/Indents by Diffuse Lighting	None permitted	Qty.2 <1.0 mm width and depth	Qty.2 <1.0 mm width and depth
Total Usable Area	≥90%	≥80%	N/A
Note: Customerized specification other than the above parameters is acceptable.

6-inch Diameter 4H N-type Silicon Carbide Substrate Specification
SUBSTRATE PROPERTY	Production Grade	Research Grade	Dummy Grade
Diameter	150 mm ± 0.1 mm
Surface Orientation	off-axis: 4° toward <11-20> ± 0.5°
Primary Flat Orientation	<1-100> ± 5.0˚
Secondary Flat Orientation	90.0˚ CW from Primary Flat ± 5.0˚, silicon face up
Primary Flat Length	47.5 mm ± 2.0 mm
Secondary Flat Length	N/A
Wafer Edge	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤10 micropipes/cm²	≤30 micropipes/cm²
Polytype Areas by High-Intensity Light	None permitted	≤5% area	≤10% area
Resistivity	0.015~0.028Ω·cm	≤0.1Ω·cm	≤0.1Ω·cm
Thickness	350.0 μm ± 25.0 μm or 500.0 μm ± 25.0 μm
TTV	≤15 μm	≤20 μm	≤25 μm
BOW (absolute value)	≤30 μm	≤40 μm	≤50 μm
Warp	≤40 μm	≤50 μm	≤60 μm
Surface Finish	Double Side Polish, Si Face CMP (chemical polishing)
Surface Roughness	CMP Si Face Ra≤0.5 nm, C Face Ra≤1 nm		N/A
Cracks by High-Intensity Light	None permitted	Cumulative length ≤3 mm on the edge	Cumulative length ≤10 mm, single length ≤2 mm
Scratches by Diffuse Lighting	Qty.≤8 scratches	Qty.≤12 scratches	Qty.≤20 scratches
Total Usable Area	≥90%	≥80%	N/A
Note: Customerized specification other than the above parameters is acceptable.

6-inch Diameter 4H Semi-insulating Silicon Carbide Substrate Specification
SUBSTRATE PROPERTY	Production Grade	Research Grade	Dummy Grade
Diameter	150 mm ± 0.1 mm
Surface Orientation	on-axis: {0001} ± 0.25°
Primary Flat Orientation	<11-20> ± 5.0˚
Secondary Flat Orientation	90.0˚ CW from Primary Flat ± 5.0˚, silicon face up
Primary Flat Length	47.5 mm ± 2.0 mm
Secondary Flat Length	N/A
Wafer Edge	Chamfer
Micropipe Density	≤1 micropipes/cm²	≤10 micropipes/cm²	≤30 micropipes/cm²
Polytype Areas by High-Intensity Light	None permitted	≤5% area	≤10% area
Resistivity	≥1E7 Ω·cm	≤1E5 Ω·cm	75% Area≤1E5 Ω·cm
Thickness	350.0 μm ± 25.0 μm or 500.0 μm ± 25.0 μm
TTV	≤15 μm	≤20 μm	≤25 μm
BOW (absolute value)	≤30 μm	≤40 μm	≤50 μm
Warp	≤40 μm	≤50 μm	≤60 μm
Surface Finish	Double Side Polish, Si Face CMP (chemical polishing)
Surface Roughness	CMP Si Face Ra≤0.5 nm, C Face Ra≤1 nm		N/A
Cracks by High-Intensity Light	None permitted	Cumulative length ≤3 mm on the edge	Cumulative length ≤10 mm, single length ≤2 mm
Scratches by Diffuse Lighting	Qty.≤8 scratches	Qty.≤12 scratches	Qty.≤20 scratches
Total Usable Area	≥90%	≥80%	N/A
Note: Customerized specification other than the above parameters is acceptable.

CETC, an active player in the Belt and Road (B&R) Initiative

Silicon Carbide (SiC) Substrate

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